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Analog and Mixed-Signal IC Design Engineer Intern

Neuralink

Neuralink

Design
Fremont, CA, USA
Posted on Tuesday, June 27, 2023

Company Description:

We are creating the future of brain-computer interfaces: building devices now that have the potential to help people with paralysis regain mobility and independence and invent new technologies that could expand our abilities, our community, and our world.

Team info:

The Brain Interfaces Soc Department delivers chip architecture and silicon implementation of neural recording and stimulation system-on-chip (SoC) for high-bandwidth brain-machine interface applications. We have crafted a team of exceptional engineers whose mission is to push the frontiers of what is possible today and define the future. To accelerate our pathway to human ready brain-computer interfaces, you will have the opportunity to partner with our electrical, microfabrication, chip designers, neuro and mechanical engineers.

Job Responsibilities:

We are looking for Analog and Mixed-Signal IC Design Engineer Interns who are interested in architecting and implementing innovative solutions with high energy-efficiency and compact silicon footprint and who thrive with the autonomy to propose creative approaches to problems.

Neuralink strives to be, as much as possible, a meritocratic environment: we require honest and transparent communication to ensure the best ideas win out, and we believe the best solutions emerge and the best teams are created when you assemble high-performing individuals with different skill sets and perspectives, and allow them to engage in rigorous and thoughtful inquiry. We want to work with exceptional people, and, to the extent that you excel, we want you to take on more responsibility and help all of us succeed. If this speaks to you, come join us.

The Analog and Mixed-Signal IC Design Engineer Intern will be responsible for analog and mixed-signal chip design, from circuit design to layout and verification.

  • Define and implement innovative and optimal analog and mixed signal circuit architectures and transistor-level circuit solutions to achieve a variety of challenging noise, mismatch, distortion, power consumption, and cost requirements.
  • Defines verification plan for a portion of IP or chip and runs complex simulations and analyses (e.g., power, performance, linearity, yield) on designs.
  • Designs, programs, and runs complex tests and reviews tests of other team members; ensures bugs and other issues are identified and appropriately analyzed.

Key qualifications:

  • Minimum 1 years of experience in analog/mixed-signal integrated CMOS circuit design for a specific area (e.g., delta-sigma ADC, SAR ADC, DAC, VCO, PLL, DLL, Audio CODEC and Class D audio amplifier, high speed PHY & SERDES) with a successful track record of silicon validation.
  • Minimum 3 months experience of application of technical skills outside of the classroom (examples: laboratory, research, extracurricular project teams, open source contributions, volunteering, personal projects or prior internship/work experience)
  • The ideal candidates are people who get excited about building things, are highly analytical, and enjoy tackling new problems regularly.

Preferred qualifications:

  • Skills in scripting and automation for complex simulation scenarios.
  • Experience in lab testing of high-precision analog and mixed-signal ICs.
  • Functional modeling experience and logic verification with Verilog AMS and SystemVerilog.
  • Experience in design and layout with advanced CMOS FinFET technologies.
  • Experience with design for high-volume production.

Pay Transparency:

Based on California law, the following details are for California individuals only:

California base hourly rate: $35 and eligible for benefits.

For full-time employees, your compensation package will include two major components: salary and equity. Guidance on salary for this role will be determined according to the level you enter the organization (with the ability to gain more through time as you contribute).
Full-Time Employees are eligible for equity and benefits listed below in addition.

What we offer:

  • An opportunity to change the world and work with some of the smartest and most talented experts from different fields.
  • Growth potential. We rapidly advance team members who have an outsized impact.
  • Excellent medical, dental, and vision insurance through a PPO plan; parental leave.
  • Flexible time off + paid holidays.
  • Equity + 401(k) plan.
  • Commuter Benefits.
  • Meals provided.

Multiple studies have found that a higher percentage of women and BIPOC candidates won't apply if they don't meet every listed qualification. Neuralink values candidates of all backgrounds. If you find yourself excited by our mission but you don't check every box in the description, we encourage you to apply anyway!

Neuralink provides equal opportunity in all of our employment practices to all qualified employees and applicants without regard to race, color, religion, gender, national origin, age, disability, marital status, military status, genetic information or any other category protected by federal, state and local laws. This policy applies to all aspects of the employment relationship, including recruitment, hiring, compensation, promotion, transfer, disciplinary action, layoff, return from layoff, training and social, and recreational programs. All such employment decisions will be made without unlawfully discriminating on any prohibited basis.